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| 74HC244 Octal 3-State Noninverting Buffer/Line Driver/ Line Receiver High-Performance Silicon-Gate CMOS The 74HC244 is identical in pinout to the LS244. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. This octal noninverting buffer/line driver/line receiver is designed to be used with 3-state memory address drivers, clock drivers, and other bus-oriented systems. The device has noninverting outputs and two active-low output enables. The HC244 is similar in function to the HC240A. Features http://onsemi.com MARKING DIAGRAM 20 20 1 TSSOP-20 DT SUFFIX CASE 948E 1 HC 244 ALYW G G * * * * * * * * * Output Drive Capability: 15 LSTTL Loads Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 2.0 to 6.0 V Low Input Current: 1.0 mA High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements Defined by JEDEC Standard No. 7A ESD Performance: HBM > 2000 V; Machine Model > 200 V Chip Complexity: 136 FETs or 34 Equivalent Gates This is a Pb-Free Device HC244 A L Y W G = Specific Device Code = Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Package (Note: Microdot may be in either location) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. (c) Semiconductor Components Industries, LLC, 2007 March, 2007 - Rev. 0 1 Publication Order Number: 74HC244/D 74HC244 PIN ASSIGNMENT ENABLE A A1 YB4 A2 YB3 A3 YB2 A4 YB1 GND 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VCC ENABLE B YA1 B4 YA2 B3 YA3 B2 YA4 B1 DATA INPUTS A4 B1 B2 B3 A2 A3 A1 2 4 6 8 11 13 15 17 LOGIC DIAGRAM 18 16 14 12 9 7 5 3 YA1 YA2 YA3 YA4 YB1 YB2 YB3 YB4 NONINVERTING OUTPUTS FUNCTION TABLE Inputs Enable A, Enable B A, B Outputs YA, YB L H Z B4 L L L H H X Z = high impedance OUTPUT ENABLES 1 ENABLE A 19 ENABLE B PIN 20 = VCC PIN 10 = GND ORDERING INFORMATION Device 74HC244DTR2G Package TSSOP-20* Shipping 2500 Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb-Free. IIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIII MAXIMUM RATINGS Symbol VCC Vin Vout Iin Iout ICC PD Tstg TL Parameter Value Unit V V V mA mA mA mW _C _C DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin DC Output Current, per Pin DC Supply Current, VCC and GND Pins Power Dissipation in Still Air, TSSOP Package Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds (TSSOP Package) - 0.5 to + 7.0 - 0.5 to VCC + 0.5 - 0.5 to VCC + 0.5 20 35 75 450 - 65 to + 150 260 This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, Vin and Vout should be constrained to the range GND v (Vin or Vout) v VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open. Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Derating -- TSSOP Package: - 6.1 mW/_C from 65_ to 125_C For high frequency or heavy load considerations, see Chapter 2 of the ON Semiconductor High-Speed CMOS Data Book (DL129/D). http://onsemi.com 2 74HC244 RECOMMENDED OPERATING CONDITIONS Symbol VCC Vin, Vout TA tr, tf Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage, Output Voltage (Referenced to GND) Operating Temperature, All Package Types Input Rise and Fall Time (Figure 1) VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V Min 2.0 0 - 55 0 0 0 Max 6.0 VCC + 125 1000 500 400 Unit V V _C ns DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND) Guaranteed Limit Symbol VIH Parameter Minimum High-Level Input Voltage Test Conditions Vout = VCC - 0.1 V |Iout| v 20 mA Vout = 0.1 V |Iout| v 20 mA Vin = VIH |Iout| v 20 mA Vin = VIH |Iout| v 2.4 mA |Iout| v 6.0 mA |Iout| v 7.8 mA VOL Maximum Low-Level Output Voltage Vin = VIL |Iout| v 20 mA Vin = VIL |Iout| v 2.4 mA |Iout| v 6.0 mA |Iout| v 7.8 mA Iin IOZ ICC Maximum Input Leakage Current Maximum Three-State Leakage Current Maximum Quiescent Supply Current (per Package) Vin = VCC or GND Output in High-Impedance State Vin = VIL or VIH Vout = VCC or GND Vin = VCC or GND Iout = 0 mA VCC (V) 2.0 3.0 4.5 6.0 2.0 3.0 4.5 6.0 2.0 4.5 6.0 3.0 4.5 6.0 2.0 4.5 6.0 3.0 4.5 6.0 6.0 6.0 - 55 to 25_C 1.5 2.1 3.15 4.2 0.5 0.9 1.35 1.8 1.9 4.4 5.9 2.48 3.98 5.48 0.1 0.1 0.1 0.26 0.26 0.26 0.1 0.5 v 85_C 1.5 2.1 3.15 4.2 0.5 0.9 1.35 1.8 1.9 4.4 5.9 2.34 3.84 5.34 0.1 0.1 0.1 0.33 0.33 0.33 1.0 5.0 v 125_C 1.5 2.1 3.15 4.2 0.5 0.9 1.35 1.8 1.9 4.4 5.9 2.2 3.7 5.2 0.1 0.1 0.1 0.4 0.4 0.4 1.0 10 mA mA V Unit V VIL Maximum Low-Level Input Voltage V VOH Minimum High-Level Output Voltage V 6.0 4.0 40 40 mA NOTE: Information on typical parametric values and high frequency or heavy load considerations can be found in Chapter 2 of the ON Semiconductor High-Speed CMOS Data Book (DL129/D). http://onsemi.com 3 74HC244 AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6 ns) Guaranteed Limit Symbol tPLH, tPHL Parameter Maximum Propagation Delay, A to YA or B to YB (Figures 1 and 3) VCC (V) 2.0 3.0 4.5 6.0 2.0 3.0 4.5 6.0 2.0 3.0 4.5 6.0 2.0 3.0 4.5 6.0 - - - 55 to 25_C 96 50 18 15 110 60 22 19 110 60 22 19 60 23 12 10 10 15 v85_C 115 60 23 20 140 70 28 24 140 70 28 24 75 27 15 13 10 15 v125_C 135 70 27 23 165 80 33 28 165 80 33 28 90 32 18 15 10 15 Unit ns tPLZ, tPHZ Maximum Propagation Delay, Output Enable to YA or YB (Figures 2 and 4) ns tPZL, tPZH Maximum Propagation Delay, Output Enable to YA or YB (Figures 2 and 4) ns tTLH, tTHL Maximum Output Transition Time, Any Output (Figures 1 and 3) ns Cin Cout Maximum Input Capacitance Maximum Three-State Output Capacitance (Output in High-Impedance State) pF pF NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the ON Semiconductor High-Speed CMOS Data Book (DL129/D). Typical @ 25C, VCC = 5.0 V CPD Power Dissipation Capacitance (Per Buffer)* 2f + I CC 34 pF * Used to determine the no-load dynamic power consumption: PD = CPD VCC ON Semiconductor High-Speed CMOS Data Book (DL129/D). VCC . For load considerations, see Chapter 2 of the SWITCHING WAVEFORMS tr 90% 50% 10% tPLH 90% 50% 10% tTLH tPHL tf VCC tPZL 50% tPZH OUTPUT Y 50% tPHZ tPLZ 10% 90% GND HIGH IMPEDANCE VOL VOH HIGH IMPEDANCE DATA INPUT A OR B OUTPUT YA OR YB VCC GND ENABLE A OR B 50% OUTPUT Y tTHL Figure 1. Figure 2. http://onsemi.com 4 74HC244 TEST CIRCUITS TEST POINT OUTPUT DEVICE UNDER TEST C L* DEVICE UNDER TEST TEST POINT OUTPUT 1 kW CONNECT TO VCC WHEN TESTING tPLZ AND tPZL. CONNECT TO GND WHEN TESTING tPHZ AND tPZH. C L* *Includes all probe and jig capacitance *Includes all probe and jig capacitance Figure 3. Test Circuit Figure 4. Test Circuit PIN DESCRIPTIONS INPUTS A1, A2, A3, A4, B1, B2, B3, B4 (Pins 2, 4, 6, 8, 11, 13, 15, 17) function as noninverting buffers. When a high level is applied, the outputs assume the high impedance state. OUTPUTS YA1, YA2, YA3, YA4, YB1, YB2, YB3, YB4 (Pins 18, 16, 14, 12, 9, 7, 5, 3) Data input pins. Data on these pins appear in noninverted form on the corresponding Y outputs, when the outputs are enabled. CONTROLS Enable A, Enable B (Pins 1, 19) Device outputs. Depending upon the state of the output-enable pins, these outputs are either noninverting outputs or high-impedance outputs. Output enables (active-low). When a low level is applied to these pins, the outputs are enabled and the devices LOGIC DETAIL TO THREE OTHER A OR B INVERTERS ONE OF 8 INVERTERS DATA INPUT A OR B VCC YA OR YB ENABLE A OR ENABLE B http://onsemi.com 5 74HC244 PACKAGE DIMENSIONS TSSOP-20 CASE 948E-02 ISSUE C 20X K REF M 2X L/2 20 11 J J1 B -U- N L PIN 1 IDENT 1 10 0.15 (0.006) T U S A -V- N F DETAIL E -W- DIM A B C D F G H J J1 K K1 L M C D 0.100 (0.004) -T- SEATING PLANE G H DETAIL E SOLDERING FOOTPRINT* 7.06 1 0.36 16X 16X 1.26 *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 6 IIII IIII IIII SECTION N-N 0.25 (0.010) M 0.15 (0.006) T U S 0.10 (0.004) TU S V S K K1 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. MILLIMETERS MIN MAX 6.40 6.60 4.30 4.50 --- 1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.27 0.37 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.252 0.260 0.169 0.177 --- 0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.011 0.015 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_ 0.65 PITCH DIMENSIONS: MILLIMETERS 74HC244 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative http://onsemi.com 7 74HC244/D |
Price & Availability of 74HC244DTR2G
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